June Newsletter - Xilinx Collaborates With TSMC on 7nm

Top Story Xilinx Collaborates With TSMC on 7nm  Xilinx® is collaborating with TSMC on the 7nm process and 3D IC technology for its next-generation All Programmable FPGAs, MPSoCs, and 3D ICs. The technology represents the fourth consecutive generation in which the two companies have worked together on advanced process and CoWoS 3D stacking technology, and it will become TSMC's fourth generation of FinFET technology. The collaboration will provide Xilinx with a multi-node scaling advantage and build on its outstanding product, execution, and market success at 28nm, 20nm, and 16nm nodes.Learn more » Featured News Doulos Training Webinar on Timing Constraints and Analysis This free webinar to be held on June 25th by Xilinx training partner Doulos will provide you with an insight into timing constraints and static timing analysis: techniques that are instrumental to successful FPGA development. Learn more » Chip Scale Review Magazine – Next Generation 3D FPGAs Xilinx’s Xin Wu, Woon-Seong Kwon, and Suresh Ramalingam recently authored an article for Chip Scale Review Magazine discussing the evolution of 3D FPGAs, their capacities for integration and growth, and considerations for 3D IC products. Read more » Spring 2015 Edition of Xcell Journal Magazine Now Available!  Xcell Journal issue 91's cover story details Xilinx's All Programmable Abstractions strategy and the delivery of the new SDAccel™ and SDSoC™ development environments, which enable design teams to be more productive and systems and software engineers to program the logic of Xilinx FPGAs and SoCs to accelerate system performance. PDF version » Web/mobile version (iPad/iPhone-compatible) » Board and Kits News Smart Vision Development Kit The Smart Vision Development Kit leverages the PicoZed System-On-Module (SOM) by providing a feature-rich, modular carrier card for machine vision applications. Learn more » Training News Xilinx Updates FPGA Design Training Courses for Vivado Design Suite 2015.1 Xilinx has updated seven courses for the Vivado® Design Suite 2015.1. The seven courses are "Vivado Design Suite Tool Flow," "Essentials of FPGA Design," "Vivado Design Suite Static Timing Analysis & Xilinx Design Constraints," "Advanced Tools & Techniques of Vivado Design Suite," "Vivado Design Suite for ISE Software Project Navigator Users," "Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users" and "The UltraFast Design Methodology." Learn more » Xilinx Updates Designing With the UltraScale Architecture  Are you interested in learning how to use the UltraScale™ architecture or how to migrate your design to the architecture? This course focuses on how to properly design for the UltraScale architecture and design migration. Hardware topics include CLB construction, clocking resources, memory and DSP resources, source-synchronous interfaces, dedicated transceivers, IP and design migration, DDR4 memory interfaces, and Vivado Design Suite considerations. Learn more » Xilinx Updates Zynq SoC Embedded Design Courses to Vivado Design Suite 2015.1  Xilinx has updated the Zynq®-7000 All Programmable SoC embedded design courses to Vivado Design Suite 2015.1 for system architects, software engineers, and hardware engineers. The labs for these courses target the use of ZC702 evaluation board, Avnet's ZedBoard and KC705 evaluation board (MicroBlaze labs). Each course can be tailored by your local Authorized Training Provider to provide the right content for you. Learn more » Xilinx Updates Training Course for C-based Design: High-Level Synthesis with Vivado HLS for 2015.1  This course provides a thorough introduction to the Vivado High-Level Synthesis (HLS) tool. It covers synthesis strategies, features, improving throughput, area, interface creation, latency, testbench coding, and coding tips. Use the Vivado HLS tool to optimize code for high-speed performance in an embedded environment, download and validate the design. Learn more » Xilinx Updates Essential Tcl Scripting for Vivado Design Suite 2015.1 Xilinx has updated Essential Tcl Scripting for the Vivado Design Suite software 2015.1. Learn how to use basic Tcl syntax and language structures to build scripts suitable for use with Xilinx FPGA design tools. Learn about the effective use of variables, data types, and Tcl constructs to build effective conditional statements and loop controls. You will also have the opportunity to use Tcl language constructs with several labs designed to provide you scripting experience within the Vivado Design Suite. Learn more » Xilinx Updates DSP Design Using System Generator This course allows you to explore the System Generator tool and to gain the expertise you need to develop advanced, low-cost Digital Signal Processing designs. This intermediate course in implementing DSP functions focuses on learning how to use System Generator for DSP, design implementation tools, and hardware co-simulation verification. Learn more » Tools & IP News SDAccel Development Environment 2015.1 Release Expands Ecosystem of Libraries, Platforms, and Design Services  The latest release enhances the SDAccel integrated development environment (IDE), extends OpenCL coverage, and features an expanded ecosystem of SDAccel-certified Alliance Members providing libraries, platforms and design services Learn more » Alliance Member News Vadatech’s New 2.6 GSPS AdvancedTCA A/D Converter Utilizes Virtex-7 FPGA In this press release from Vadatech, the company describes the ATC136 AdvancedTCA ADC with its key features of a Virtex®-7 FPGA and 4-core PowerPC for very high performance and processing efficiency (PDF). Learn more » White Paper High Speed, 4 Port, SAS Data Recorder IP Core for Xilinx series 7 FPGAs  The SAS Recorder IP Core from ASICS World Services provides a ready to use solution for high speed data recording applications. 4.8 GBps bandwidth and a simple interface guarantee fast time-to-market solutions (PDF). Learn more » Shenzhen MYIR Tech Limited: Low-cost Xilinx Zynq-7010/20 SoM and Development Board Shenzhen MYIR Tech has introduced a development board MYD-C7Z010/20 based on the Linux-ready SoM MYC-C7Z010/20. It is a high-performance and low-cost development platform for evaluation and prototype based on Xilinx Zynq-7010 or 7020 All Programmable SoC devices. Learn more » X-ES' XPedite2470 3U VPX Virtex-7 FPGA Featuring an FMC Site and Multiple High-Speed Fabric Interfaces The XPedite2470 from Extreme Engineering Solutions is a high-performance, reconfigurable, conduction- or air-cooled, 3U VPX, FPGA processing module based on the Xilinx Virtex-7 family of FPGAs. With multiple high-speed fabric interfaces, external memory, Virtex-7 FPGA, an FMC site, and high-density I/O, the XPedite2470 is ideal for customizable, high-bandwidth, signal-processing applications. Learn more » Sundance Hands PC/104 Eco-system a SBC, Based on Xilinx Zynq SoC EMC2 is a stackable SBC compatible with PCIe/104 OneBank™ PCI-Express interface and VITA57.1 FMC-LPC™, controlled by a Xilinx Zynq SoC and has all the PS interfaces routed to a Samtec Razor Beam™ connector for making customized I/O with user-defined connector and uses a “System-on-Module” concept to make upgrade to alternative Xilinx Zynq SoC or FPGAs. Read more » eInfochips White Paper – Speed Control for Brushless DC Motor Using PID Algorithm The paper covers the use of the Xilinx Kintex®-7 FPGA for implementation in a closed loop control system. The closed loop system controls the speed of a three-phase Brushless Direct Current (BLDC) motor by using feedback from three hall sensors. The FPGA supports reconfigurable computing and facilitates on-chip parallelism so higher operational performance is / achieved (PDF). Learn more » Xcell Daily Top 5  How do you design backplanes for 25+ Gbps operation? Teraspeed’s Scott McMorrow tells you how in two videos Adam Taylor’s MicroZed Chronicles Part 87: Getting SDSoC up and running Part 3 Hyperspectral GigE video cameras from Photonfocus see the unseen @ 42fps for diverse imaging applications Development team at Yonsei University demos full-duplex LTE prototype for 5G systems Adam Taylor’s MicroZed Chronicles Part 86: Getting SDSoC up and running In the News  Xilinx Wins Leading Lights Award for Outstanding Components Vendor at the 2015 Big Telecom Event Xilinx Joins Global Leaders at the 2015 OpenPOWER Foundation China Summit to Accelerate Next Generation Data Center Innovation Upcoming Events International Conference on Machine Learning July 6-11 - Lille-Euralille, France  Flash Memory Summit August 11-13 - Santa Clara, CA SC15 (SuperComputing) November 16-19 – Austin, TX Follow Xilinx